Course description

Instruction Level Parallelism:
Basic concepts of pipelining,Arithmetic pipelines,Instruction pipelines,Hazards in a pipeline: structural, data, and control hazards,Overview of hazard resolution techniques,Dynamic instruction scheduling,Branch prediction techniques,Instruction-level parallelism using software approaches,Superscalar techniques,Speculative execution,Review of modern processors /*The objective is to explain how ILP
techniques have been deployed in modern processors*/,Pentium Processor: IA 32 and P6 microarchitectures,ARM Processor.

Memory Hierarchies:
Basic concept of hierarchical memory organization,Main memories,Cache memory design and implementation,Virtual memory design and implementation,Secondary memory technology,RAID.

Peripheral Devices:
Bus structures and standards,Synchronous and asynchronous buses,Types and uses of storage devices,Interfacing I/O to the rest of the system,Reliability and availability,I/O system design,Platform architecture.

Thread Level Parallelism:
Centralized vs. distributed shared memory,Interconnection topologies,Multiprocessor architecture,Symmetric multiprocessors,Cache coherence problem,Synchronization,Memory consistency,Multicore architecture,Review of modern multiprocessors.

Process Level Parallelism:
Distributed computers,Clusters,Grid,Mainframe computers.

What will i learn?

Requirements

skill expert

Free

Lectures

41

Skill level

Beginner

Expiry period

Lifetime

Certificate

Yes

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Overview In this course, we first provide a comprehensive overview of memory systems, taking an approach that covers both fundamentals and recent research. We first introduce fundamental principles and ideas, covering DRAM and emerging memory technologies as well as many architectural concepts and ideas related to memory organization, memory control, processing-in-memory, and memory latency / energy / bandwidth / reliability / security / QoS. We discuss major challenges facing modern memory systems (and the computing platforms we currently design around the memory system) in the presence of greatly increasing demand for data and its fast analysis. We examine some promising research and design directions to overcome these challenges. On the research-related part of course (sprinkled across topical lectures), we discuss the following key research topics in detail, focusing on both open problems and potential solution directions: Fundamental issues in memory reliability and security and how to enable fundamentally secure, reliable, safe architectures Enabling data-centric and hence fundamentally energy-efficient architectures that are capable of performing computation near data Reducing both latency and energy consumption by tackling the fixed-latency/energy mindset Enabling emerging memory technologies Enabling predictable and QoS-aware memory systems Research challenges and opportunities in enabling emerging NVM (non-volatile memory) technologies Scaling NAND flash memory and SSDs (solid state drives) into the future

Free

22:36:25 Hours